IP Law Daily, PATENT—S.D.N.Y.: Intellectual Ventures can proceed with infringement suit against JP Morgan Chase, (Jul 2, 2015)

By Mark Engstrom, J.D.

JP Morgan Chase (JPMC) was denied summary judgment of non-infringement in a lawsuit brought by Intellectual Ventures for the infringement of a patent that described a “crypto-engine” co-processor, the federal district court in New York City has ruled (Intellectual Ventures II, LLC v. JP Morgan Chase & Co., June 30, 2015, Hellerstein, A.).

Background. Patent holding company Intellectual Ventures II sued JP Morgan Chase & Co. (JPMC) for the infringement of U.S. Patent No. 7,634,666 (the “crypto-engine” patent), which disclosed computer hardware that could execute two commonly-used public key encryption protocols: the Rivest-Shamir-Adleman (RSA) protocol and the Elliptic Curve Cryptography (ECC) protocol. The patent described a co-processor—the “crypto-engine”—that assisted a host processor, such as a personal or network computer, with the encryption of data.

Two aspects of the claimed hardware were particularly relevant: (1) the crypto-engine contained a Modular Arithmetic Unit (MAU), which could execute cryptographic algorithms at a higher speed than a host processor, and an Interface Control Unit (ICU), which moderated between the host processor and the MAU and synchronized the two asynchronous speeds, and (2) the claimed MAU could execute both the RSA and the ECC protocols.

Intellectual Ventures alleged the infringement of claim 4 of the crypto-engine patent, which described, in relevant part, a crypto-engine that comprised an “arithmetic unit” that operated as a co-processor for the host processor and an “interface controller” for managing communications between the arithmetic unit and the host processor. The interface controller included a bus interface, a concatenator/splitter, and a “cryptographic controller.” The cryptographic controller generated status and interrupt signals for the host processor. It also generated an “op-code signal” for the arithmetic unit, which selected the RSA or ECC mode of operation, based on the op-code signal.

According to Intellectual Ventures, the infringing device was the IBM 4765 PCIe Cryptographic Coprocessor (the “IBM Crypto Card”), which contained a module central processing unit (MCPU) that purportedly operated as the “cryptographic controller” in Claim 4. The IBM Crypto Card also contained the “Otello” microchip, which purportedly operated as the “arithmetic unit” in Claim 4.

The MCPU was capable of receiving from the host processor requests to carry out the functions of the RSA or ECC public key encryptions. After receiving those requests, the MCPU generated op-codes for use by Otello. Although the op-ed codes were not sent directly to Otello, the op-code signals were generated by the MCPU for the sole purpose of instructing Otello to perform an RSA or ECC function. Based on those signals, Otello performed either the RSA or the ECC functions.

Intellectual Ventures argued that the language of claim 4 was satisfied because the MCPU generated an op-code signal for Otello and Otello selected the RSA or ECC modes of operation based on the op-code signal. JPMC acknowledged that Otello performed RSA and other mathematical functions, but it argued that Otello did not perform ECC operations. According to JPMC, the MCPU was capable of performing ECC operations, not Otello. Moreover, Otello’ s selection of the ECC operation could not be based on the op-code signal, as required by Claim 4, because the MCPU did not send an op-code signal directly to Otello.

Analysis. JPMC argued that claim 4 was directed to “actual functionality,” not capability. Because the IBM Crypto Card did not select or execute an ECC algorithm in practice, non-infringement was established as a matter of law, in JPMC’s view.

The court noted that the claim term “op-code signal” was construed as a signal that was capable of indicating an RSA operation when it had one characteristic and an ECC operation when it had a different characteristic. Furthermore, the patent specification made it clear that the crypto-engine patent was broad enough to encompass hardware that was “capable” of performing ECC operations. The specification, for example, stated that the invention included a crypto-engine that was “capable of executing” either RSA or ECC public key encryption protocols.

According to the court, Intellectual Ventures presented sufficient evidence to raise a triable issue of fact regarding the IBM Crypto Card’s capability of selecting between the RSA and ECC functionalities. The data sheet for the IBM Crypto Card, for example, stated that the card contained “[h]ardware to perform … large number modular math functions for RSA (up to 4096-bit), ECC Prime Curve, and other public-key cryptographic algorithms.”

JPMC also argued that the IBM Crypto Card did not infringe the crypto-engine patent because no evidence showed that the MCPU sent op-code signals directly to Otello. In the court’s view, however, neither claim 4 nor the court’s construction of the relevant claim language was that narrow. According to the court, the crypto-engine patent encompassed an arithmetic unit that selected either RSA or ECC protocols “based on” a generated op-code signal.

Because Intellectual Ventures identified evidence that was sufficient to raise a triable issue of fact regarding the IBM Crypto Card’s capability with respect to ECC functionality, summary judgment in favor of JPMC was unwarranted.

The case is No. 13 Civ. 3777 (AKH)

Attorneys: Clayton W. Thompson II (Feinberg, Day, Alberti & Thompson, LLP) for Intellectual Ventures II, LLC. Matthew Seldin Dontzin (Dontzin, Nagy & Fleissig, LLP) for JP Morgan Chase & Co.; JPMorgan Chase Bank, National Association; Chase Bank USA, National Association; Chase Paymentech Solutions, LLC; and Paymentech LLC.

Companies: Intellectual Ventures II, LLC; JP Morgan Chase & Co.; JPMorgan Chase Bank, National Association; Chase Bank USA, National Association; Chase Paymentech Solutions, LLC; and Paymentech LLC

Cases: Patent NewYorkNews