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    IP Law Daily, PATENT—Fed Cir.: Obviousness of multiple-cache computer processor reversed on appeal, (Mar 13, 2023)

    Law Firms Mentioned:Quinn Emanuel Urquhart & Sullivan, LLP
    Organizations Mentioned:Intel Corp. | Kirkland & Ellis, LLP | Pact XPP Schweiz AG | Quinn Emanuel Urquart & Sullivan, LLP

    By Kevin M. Finson, J.D.

    An inter partes review determination that a multiple-cache system for computer processors was not proven obvious was reversed on appeal because the PTAB’s decision was not supported by substantial evidence.

    Intel was entitled to reversal of a P ...

    By Kevin M. Finson, J.D.

    An inter partes review determination that a multiple-cache system for computer processors was not proven obvious was reversed on appeal because the PTAB’s decision was not supported by substantial evidence.

    Intel was entitled to reversal of a PTAB finding that it had failed to show the obviousness of a competitor’s patent, the U.S. Court of Appeals for the Federal Circuit has held. The obviousness determination was not supported by substantial evidence (Intel Corp. v. Pact XPP Schweiz AG, March 13, Prost, S.).

    PACT XPP Schweiz AG (PACT) was the owner of U.S. Patent No. 9,250,908 (the ’908 patent), which claimed a multiprocessor computer system with multiple caches for storing data. Intel Corporation (Intel) petitioned for inter partes review of claims 4 and 5 of the ’908 patent on the ground of obviousness in light of the combination of two prior art references. PACT disclaimed claim 4, and the Patent Trial and Appeal Board held that Intel had failed to show obviousness of claim 5. Intel appealed.

    Prior art disclosure. First, Intel argued that the Board erred by finding that “segment-to-segment” connections between the computer system’s processors, second-level cache, and memory were not disclosed in the prior art. The court examined a color-coded diagram from a prior patent application which had been entered into evidence below and found that it “teaches – if not plainly illustrates” the connections described by Intel. The Board’s finding to the contrary was therefore not supported by substantial evidence.

    Motivation to combine. Second, Intel argued that the Board erred by finding that Intel had failed to show a motivation to combine two prior art references. The two references were both directed at solving the problem of keeping cached data consistent in a multiple processor and multiple cache system. The Board held that because both were directed to solving the same problem there would be no reason to combine them. The court, however, explained that the fact both systems were directed to solving the same problem was exactly why a skilled artisan would be motivated to combine them. The court further noted that this was apparent from all of the longstanding case law on the issue of motivation to combine from both the Federal Circuit and the U.S. Supreme Court. The Board’s finding on this issue was also not supported by substantial evidence.

    The court remanded the case to the PTAB for further proceedings.

    The Case is No. 22-1037.

    Attorneys: John C. O'Quinn (Kirkland & Ellis, LLP) for Intel Corp. Sanford Ian Weisburst (Quinn Emanuel Urquhart & Sullivan, LLP) for Pact XPP Schweiz AG.

    Companies: Intel Corp.; Pact XPP Schweiz AG

    Cases: Patent FedCirNews USPTO

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